With the development of technology in intelligent, wearable and mobile applications, there is a need for developing Liquid Crystal Displays with ultra-low power consumption. As a new low power consumption LCD display technique, Memory in Pixel (MIP) display technique has a promising development prospect due to its characteristics such as no need to change LCD manufacture process, no need to develop new material, simple structure, low cost, and the like.
FIG. 1 is a circuit diagram of a conventional pixel driving circuit. As shown in FIG. 1, the pixel driving circuit includes a switching transistor TFT, an Analog Memory Unit (AMU), a storage capacitor Cst and a liquid crystal capacitor Clc. When a display panel incorporating the pixel driving circuit is in a standby state or is displaying a static picture (i.e., in a static display mode), the AMU provides a stable data voltage to the liquid crystal capacitor Clc. In this case, it is not necessary for a gate driver to update the displayed picture, such that the update rate of the display panel for displaying the static picture can be reduced. In this way, the electrical power consumption of the integrated circuit, and thus the overall electrical power consumption of the display panel, can be reduced.
However, the current AMU has a complex circuit structure and is difficult to be integrated into a pixel circuit. Hence, an integrated 1-bit digital memory is typically used as the AMU. However, such digital memory can only store a black/white voltage of an LCD pixel, i.e., capable of black-and-white display only, and thus greatly limits the application of the MIP display technique.
Therefore, there is a need for a solution of the technical problem regarding how to apply the MIP display technique to color display.